About Careertakes

👉 Important disclosure: Careertakes is a third-party recruiting platform supporting this hiring process. If selected, you will be employed directly by our client, Software Development.

Applicants for this role may also receive access to additional matched opportunities through the Careertakes platform.

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Role overview

Confidential Client is hiring a Chip/Software Engineer to help build AI-native EDA tools that transform how chips are designed. This is a hands-on engineering role: you will write production-quality Python and C++ code, make architecture decisions for core product features, and work directly with customers to translate feedback into product improvements.

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What You’ll Do

• Write, test, and ship high-quality production code in Python and C++ for front-end EDA workflows
• Design and influence software architecture for features used by enterprise chip designers
• Integrate synthesis, verification, and other VLSI front-end tools into scalable workflows
• Collaborate with customers and product teams to translate user feedback into product roadmaps
• Optimize tool flow for PPA and functional correctness convergence where applicable
• Work from first principles, use data-driven metrics, and iterate quickly on designs

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Minimum qualifications

• 1+ year of relevant industry experience (ASIC/EDA or equivalent engineering experience)
• Experience designing ASICs using SystemVerilog and front-end synthesis/verification tools (open-source and/or commercial)
• Strong software development skills in Python and C++; able to ship production-quality code quickly
• Basic knowledge of statistics and AI/ML methods and how they apply to EDA problems
• Resilient, self-driven, and comfortable owning features end-to-end
• Bachelor’s degree in Electrical Engineering, Computer Science, or a related field (or equivalent experience)
• Must be legally authorized to work in the U.S.

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Preferred qualifications

• 1+ tapeouts, ideally on advanced technology nodes
• Contributions to open-source EDA or chip-design projects
• Deep experience with PPA optimization and front-end convergence/verification
• Familiarity with building agent-driven or AI-assisted design flows

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Compensation & Benefits

• Salary range: $140,000 - $220,000 USD (base) — salary shown per source posting
• Competitive equity package
• Full health, vision, and dental benefits; 401(k) where applicable
• Team meals and regular engineering collaboration
• Opportunity to work closely with founders and early product direction

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Location & Work Authorization

• Primary location: Mountain View, CA (onsite/hybrid as required by our confidential client)
• Candidates must be authorized to work in the United States; sponsorhip may not be available

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Keywords & fit

This role is a great fit for engineers with a blend of VLSI front-end design and software engineering experience — especially those experienced with SystemVerilog, front-end EDA tools, Python/C++, and AI-for-EDA workflows.

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Equal Opportunity & Hiring Transparency

Careertakes and our client are Equal Opportunity Employers committed to building a diverse and inclusive workforce. We prohibit discrimination or harassment of any kind. To support a fair and efficient hiring process, AI tools may be used to assist with application review or resume screening. These tools do not replace human decision-making. Final hiring decisions are made by people.

If you have questions about how your data is used, please contact us directly.